2024年6月11日发(作者:)

FP6600Q

USB Dedicated Charging Port Controller for

Fast Charging Protocol and QC 2.0/3.0

Features

● Support HiSilicon Fast Charging Protocol (FCP)

for output voltage and current communication.

®

● Support Qualcomm Quick Charge

TM

2.0/3.0

● Class A : 5V/9V/12V Output Voltage.

● Class B : 5V/9V/12V/20V Output Voltage.

● Automatic Selection FCP and 2.0/3.0 protocols.

● Supports USB DCP Shorting D+ Line to D- Line

per USB Battery Charging Specification,

Revision 1.2.

● Meets Chinese Telecommunication Industrial

Standard YD/T 1591-2009

● Supports USB DCP applying 2.7V on D+ line

and 2.7V on D- line.

● Supports USB DCP applying 1.2V on D+ and D-

lines

● Output overvoltage protection

● Over-temperature protection

● Distant shutdown protection

● SOP-8 Pb-Free Package

Description

The FP6600Q is a fast charge protocol controller

for HiSilicon Fast Charging Protocol (FCP) and

®

Qualcomm Quick Charge

TM

2.0/3.0(QC 2.0/3.0)

USB interface. The device can fast charging FCP

or

Quick Charge 2.0/3.0 powered device

(PD). The protocol feature monitors USB D+/D-

data line voltage or D- data line transmission and

automatically adjusts output voltage of power

bank and wall adaptor to optimize charge time.

FP6600Q can support not only USB BC compliant

devices, but also Apple / Samsung devices and

automatically detects whether a connected

powered device is Quick Charge 2.0/3.0 or

FCP capable before enabling output voltage

adjustment. If a PD not compliant to Quick

Charge 2.0/3.0 is detected the FP6600Q disables

output voltage adjustment to ensure safe

operation with legacy 5 V only USB PDs.

The FP6600Q is available in a space-saving

SOP-8.

Applications

● Wall-Adapter, Smart Phones, Tablets, Netbooks

● Mobile / Tablet Power Bank

● Car Charger

● USB Power Output Ports

Pin Assignments

SO Package(SOP-8)

TD

FA

GND

FBO

1

2

3

4

8

7

6

5

VDD

REF

D+

D-

Ordering Information

FP6600Q

Package Type

SO: SOP-8

Figure 1. Pin Assignment of FP6600Q

FP6600Q-Preliminary0.1-APR-2016

1

FP6600Q

Typical Application Circuit

VOUT

R

VDD

2.2KΩ

VDD

C

VDD

FP6600Q

FBO

FA

GND

TD

VDD

REF

D

-

D

+

R

1

FB

100KΩ

4

2

3

1

470nF

8

7

5

6

USB Port

VOUT

D-

D+

GND

R

REF

R

2

R

3

R

NTC

Figure 2. Typical Application Schematic

设计指导:/product/

Output Voltage Lookup Table(QC 2.0/3.0)

D+ D- Output Voltage

3.3V

0.6V

3.3V

0.6V

0.6V

3.3V

0.6V

0.6V

3.3V

High-Z

20V

12V

9V

Continuous mode

5V (Default)

FP6600Q-Preliminary0.1-APR-2016

2

C

U

S

B

1

U

S

B

-

1

D

C

B

举例原理图:

IC代理商:深圳市百盛新纪元半导体有限公司

2

A

)

FP6600Q

C

+

N

VD

-

DG

1234

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K

2

2

R

.

2

5

6

8

D

4

D

D

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V

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6

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F

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2

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100uF 60V

V

8

N

I

V

FP6600Q

Pin Function

Connect external temperature sensor (NTC resistor).

If any fault (OVP,OTP,DSP) occur then FAP pin source current.

Ground Pin.

Feedback output. Current Sink/Source FB Node.

USB D- data line input

USB D+ data line input. Recommended this pin connect without resistors(open) or

with a resistor higher than 1MΩ connect to GND.

Through connect resistor provides output voltage selection.(R

REF

>33Kor REF pin

logic high select Class A and R

REF

<15K or REF pin logic low select Class B.)

Power Supply Input Pin.

Functional Pin Description

Pin

Name

TD

FA

GND

FBO

D-

D+

REF

VDD

Pin No.

(SOP-8)

1

2

3

4

5

6

7

8

Block Diagram

VDD

VDD

6.4V

UVLO &

POR

2.0V

D+

0.325V

500KΩ

REF

Select Class

A or B

TD

Control

Logic

SW1

Auto-

Detection

VDD

FBO

Up/Down

Current Step

2.0V

D-

0.325V.

20KΩ

FA

SW2

Figure 3. Block Diagram of FP6600Q

FP6600Q-Preliminary0.1-APR-2016

3

FP6600Q

Absolute Maximum Ratings

● Input Supply Voltage VDD ----------------------------------------------------------------------------- -0.3V to +6.5V

● All Other Pins Voltage ----------------------------------------------------------------------------------- -0.3V to +6.5V

● Maximum Junction Temperature (T

J

)-----------------------------------------------------------------

+150℃

● Storage Temperature (T

S

)-------------------------------------------------------------------------------

-65℃ to +150℃

● Lead Temperature (Soldering, 10sec.) -------------------------------------------------------------- +260°C

● Power Dissipation @T

A

=25℃, (P

D

)

● Package Thermal Resistance, (θ

JA

):

SOP-8 ------------------------------------------------------------------------------------------- 1.39W

SOP-8--------------------------------------------------------------------------------------------

90°C/W

● Package Thermal Resistance, (θ

JC

):

SOP-8--------------------------------------------------------------------------------------------

39°C/W

Note1:Stresses beyond those listed under “Absolute Maximum Ratings" may cause permanent damage to the device.

Recommended Operating Conditions

● Input Supply Voltage (VDD)---------------------------------------------------------------------------- 3.2V ~ 6.4V

● Operation Temperature Range (T

OPR

) -------------------------------------------------------------- -40°C to +85°C

Note:Over operating free-air temperature range (unless otherwise noted)

FP6600Q-Preliminary0.1-APR-2016

4

FP6600Q

Electrical Characteristics

(VDD=5V, T

A

=25℃ and the recommended supply voltage range, unless otherwise specified.)

Parameter

Input Power

VDD Input Voltage Range

Input UVLO Threshold

VDD Supply Current

VDD Shunt Voltage

V

DD

V

UVLO(VTH)

V

DD

Falling

V

DD

=5V, Measure V

DD,

IV

DD

= 3mA

3.2

2.5

5.9

200

6.4

6.4

2.9

6.8

V

Symbol Conditions Min Typ Max Unit

V

μA

V

V

DD(SHUNT)

High Voltage Dedicated Charging Port (HVDCP)

Data Detect Voltage

Output voltage selection reference

D+ High Glitch Filter Time

D- Low Glitch Filter Time

Output Voltage Glitch Filter Time

D- Pull-Down Resistance

Continuous Mode Glitch Filter Time

D+ Leakage Resistance

Switch SW1 on-resistance

Up/Down Current Step

V

DAT(REF)

V

SEL_REF

T

GLITCH(BC)-

D+_H

T

GLITCH(BC)-

D-_L

T

GLITCH(V)

CHANGE

R

D-(DWN)

T

GLITCH-CON

T-CHANGE

R

DAT-LKG

R

DS_ON_N1

I

UP,

I

DOWN

V

DD

=3.2-6.4V,VD+=0.6-3.6V

Switch SW1=Off

V

DD

=5V,SW1= 200μA

I

UP

= 40

μ

A (9V), 70

μ

A (12V),

I

DOWN

= 14

μ

A (3.6V)

0.25

0.325

1.8

1000

20

100

300

2.0

1250

1

40

20

500

2

0.4

2.2

1500

60

200

800

40

V

V

ms

ms

ms

μs

Ω

μA

DCP 1.2V Charging Mode

D+

_1.2V

/D-

_1.2V

line output voltage

D+

_1.2V

/D-

_1.2V

line output Impedance

1.08

1.2

100

1.32

V

Apple 2.4A Mode

D+

_2.7V

/D-

_2.7V

line output voltage

D+

_2.7V

/D-

_2.7V

line output Impedance

2.57

2.7

33.6

2.84

V

Protection

I

UP

= 0 (5V)

QC 2.0

Mode

I

UP

= 40

μ

A (9V)

I

UP

= 70

μ

A (12V)

I

UP

= 150

μ

A(20V)

1.42

1.58

1.72

2.1

1.52

1.72

1.87

2.28

1.62

1.86

2.02

2.46

Over Voltage Protection Threshold Voltage

V

FP6600Q-Preliminary0.1-APR-2016

5

FP6600Q

Electrical Characteristics(Continued)

(VDD=5V, T

A

=25℃ and the recommended supply voltage range, unless otherwise specified.)

Parameter Symbol Conditions

QC 3.0

Continuous

Mode

R

REF

> 33 KΩ or

Logic High,

Class A

R

REF

< 15 KΩ or

Logic Low,

Class B

Min

1.72

Typ

1.87

Max

2.02

Unit

Over Voltage Protection Threshold Voltage

V

2.1

500

1.1

80

10

90

2.28

60

1.2

1

130

2.46

1.3

120

13

170

Over Voltage Detection Deglitch Time

Over Voltage Detection Blanking Time

Over Temperature Threshold

Over Temperature Deglitch Time

Temperature Monitor Current Source

Temperature Monitor On Time

Protection Current Source

μs

ms

V

ms

μA

ms

μA

D- SECTION (FCP)

D- FCP Tx Valid Output High

D- FCP Tx Valid Output Low

D- FCP Rx Valid Output High

D- FCP Rx Valid Output Low

D- Output Pull-Low Resistance (FCP)

Unit Interval For FCP PHY communication

V

TX-VOH

V

TX-VOL

V

RX-VIH

V

RX-VIL

R

PD

UI

f

CLK

= 125KHz

2.55

1.4

400

144

500

160

3.6

0.3

3.6

1.0

600

176

V

V

V

V

Ω

μs

Note:Not production tested.

FP6600Q-Preliminary0.1-APR-2016

6