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元器件交易网

SN74LVC2G04

DUALINVERTERGATE

SCES195L–APRIL1999–REVISEDJANUARY2007

FEATURES

AvailableintheTexasInstruments

NanoFree™Package

Supports5-VV

CC

Operation

InputsAcceptVoltagesto5.5V

Maxt

pd

of4.1nsat3.3V

LowPowerConsumption,10-µAMaxI

CC

±24-mAOutputDriveat3.3V

TypicalV

OLP

(OutputGroundBounce)<0.8V

atV

CC

=3.3V,T

A

=25°C

TypicalV

OHV

(OutputV

OH

Undershoot)>2Vat

V

CC

=3.3V,T

A

=25°C

DBV PACKAGE

(TOP VIEW)

DCK PACKAGE

(TOP VIEW)

I

off

SupportsPartial-Power-DownMode

Operation

Latch-UpPerformanceExceeds100mAPer

JESD78,ClassII

ESDProtectionExceedsJESD22

–2000-VHuman-BodyModel(A114-A)

–200-VMachineModel(A115-A)

–1000-VCharged-DeviceModel(C101)

DRL PACKAGE

(TOP VIEW)

YZP PACKAGE

(BOTTOM VIEW)

1A

GND

2A

16

1Y

V

CC

2Y

1A

GND

1

2

3

6

5

4

1Y

V

CC

2Y

1A

GND

2A

1

2

3

6

5

4

1Y

V

CC

2Y

2A

GND

1A

34

25

16

2Y

V

CC

1Y

2

5

4

2A

3

See mechanical drawings for dimensions.

DESCRIPTION/ORDERINGINFORMATION

Thisdualinverterisdesignedfor1.65-Vto5.5-VV

CC

74LVC2G04performstheBoolean

functionY=A.

NanoFree™packagetechnologyisamajorbreakthroughinICpackagingconcepts,usingthedieasthe

package.

Thisdeviceisfullyspecifiedforpartial-power-downapplicationsusingI

off

.TheI

off

circuitrydisablestheoutputs,

preventingdamagingcurrentbackflowthroughthedevicewhenitispowereddown.

ORDERINGINFORMATION

T

A

PACKAGE

(1)

NanoFree™–WCSP(DSBGA)

0.23-mmLargeBump–YZP

(Pb-free)

–40°Cto85°C

SOT(SOT-23)–DBV

SOT(SC-70)–DCK

SOT(SOT-563)–DRL

(1)

(2)

Reelof3000

Reelof3000

Reelof250

Reelof3000

Reelof250

Reelof4000

ORDERABLEPARTNUMBER

SN74LVC2G04YZPR

SN74LVC2G04DBVR

SN74LVC2G04DBVT

SN74LVC2G04DCKR

SN74LVC2G04DCKT

SN74LVC2G04DRLR

TOP-SIDEMARKING

(2)

___CC_

C04_

CC_

CC_

Packagedrawings,standardpackingquantities,thermaldata,symbolization,andPCBdesignguidelinesareavailableat

/sc/package.

DBV/DCK/DRL:Theactualtop-sidemarkinghasoneadditionalcharacterthatdesignatestheassembly/testsite.

YZP:Theactualtop-sidemarkinghasthreeprecedingcharacterstodenoteyear,month,andsequencecode,andonefollowing

charactertodesignatetheassembly/1identifierindicatessolder-bumpcomposition(1=SnPb,•=Pb-free).

Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas

Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.

NanoFreeisatrademarkofTexasInstruments.

PRODUCTIONDATAinformationiscurrentasofpublicationdate.

ProductsconformtospecificationsperthetermsoftheTexas

tionprocessingdoesnot

necessarilyincludetestingofallparameters.

Copyright©1999–2007,TexasInstrumentsIncorporated

元器件交易网

SN74LVC2G04

DUALINVERTERGATE

SCES195L–APRIL1999–REVISEDJANUARY2007

FUNCTIONTABLE

(EACHINVERTER)

INPUT

A

H

L

OUTPUT

Y

L

H

LOGICDIAGRAM(POSITIVELOGIC)

1A

16

1Y

2A

34

2Y

AbsoluteMaximumRatings

(1)

overoperatingfree-airtemperaturerange(unlessotherwisenoted)

MIN

V

CC

V

I

V

O

V

O

I

IK

I

OK

I

O

Supplyvoltagerange

Inputvoltagerange

(2)

Voltagerangeappliedtoanyoutputinthehigh-impedanceorpower-offstate

(2)

Voltagerangeappliedtoanyoutputinthehighorlowstate

(2)(3)

Inputclampcurrent

Outputclampcurrent

Continuousoutputcurrent

ContinuouscurrentthroughV

CC

orGND

DBVpackage

θ

JA

Packagethermalimpedance

(4)

DCKpackage

DRLpackage

YZPpackage

T

stg

(1)

(2)

(3)

(4)

Storagetemperaturerange–65

V

I

<0

V

O

<0

–0.5

–0.5

–0.5

–0.5

MAX

6.5

6.5

6.5

V

CC

+0.5

–50

–50

±50

±100

165

259

142

123

150°C

°C/W

UNIT

V

V

V

V

mA

mA

mA

mA

Stressesbeyondthoselistedunder"absolutemaximumratings"restressratings

only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder"recommendedoperating

conditions"retoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.

Theinputnegative-voltageandoutputvoltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved.

ThevalueofV

CC

isprovidedintherecommendedoperatingconditionstable.

ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51-7.

2

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